Some conventional computing systems include multiple chips that communicate to each other over data transmission lines. Focusing on one data line, on one side of the data line there is a transmit data buffer, and on the other side of the data line is a receive data buffer. The transmit data buffer may receive data from a flip-flop and then transmit the data over the transmission line, and the receive data buffer may then capture the data from the transmission line using a comparator and a flip-flop. The transmit data buffers, the receive data buffers, and the data transmission lines spanning from one chip to the other are often referred to as a die-to-die interface.
Continuing with the example, some transmit data buffers transmit the data at a same voltage swing as its power supply (VDD). For example, if a power supply provides 1.5 V to the transmit data buffer, then the transmit data buffer may output bits using 1.5 V for a binary one and 0 V for a binary zero, thereby using the full 1.5 V swing. Using a larger voltage swing may in some systems provide for a high signal integrity at the die-to-die interface.
As chips are often deployed in mobile devices, power savings has become a focus of interest. For example, strategies such as power collapsing cores during an idle time and/or gating a clock to idle components are conventional techniques to reduce wasted power in computing chips. Die-to-die interfaces also consume power; therefore it would be desirable to save power at die-to-die interfaces when possible while providing high signal integrity.